This invention relates generally to an improved process for controlling surface doping and to improved methods for isolating between semiconductor devices, and more specifically to improved methods for isolating between CMOS devices.
In the formation of semiconductor devices, and specifically in the fabrication of semiconductor integrated circuits, an oxide layer, usually called a "field oxide", is used to isolate between adjacent devices. This is especially true with insulated gate field effect transistor circuits (MOS circuits), but is true of bipolar and other circuits as well.
Field oxide is usually formed by a process in which an oxidation resistant material such as silicon nitride or a combination of silicon nitride with silicon oxide or other materials is formed on a semiconductor substrate overlying active device regions where transistors or other devices are to be formed. The substrate is then heated in an oxidizing ambient to grow a thermal oxide on those portions of the substrate not protected by the oxidation resistant material. The nature of thermal oxide formation causes the oxide so formed to be recessed into the silicon substrate as silicon is incorporated into the silicon oxide.
In addition to the thick field oxide, a field doping region is also used to enhance the isolation. Field doping is an enhanced doping at the silicon surface, beneath and preferably in alignment with the field oxide, which increases the field threshold voltage and thus reduces the possibility of parasitic device action between adjacent unrelated devices. In a CMOS structure the field doping may include both enhanced N-type doping and P-type doping in the surface regions which are doped N-type and P-type, respectively.
There are a number of problems associated with the use of a conventional process for the formation of the localized silicon oxide isolation. These problems are especially significant with newer circuits which utilize an ever increasing number of devices and in which the devices are of ever decreasing size, both in surface area and depth. To produce a thermal oxide of sufficient thickness to provide the desired electrical isolation between devices requires a significant amount of processing at an elevated temperature. Long times at elevated temperatures are inconsistent with shallow devices and tend to cause crystalline defects in the semiconductor substrate. In addition, as thermal oxides grow in thickness, they also grow laterally. Thick oxides thus use a considerable amount of lateral space and accordingly require an increase in the size of the circuit chip. This is especially true when the circuit involves a large number of devices and thus a large number of isolation regions between the devices. Still further, as the thermal oxide grows and expands laterally, the oxide encroaches under the edge of the oxidation resistant material, causing a lifting of the edge of the oxidation resistant material and forming what is known in the semiconductor industry as a "bird's beak".
The incorporation of field doping in combination with the field oxide requires additional masking steps in the device fabrication process, and especially in the CMOS process where separate N and P-type field doping must be accommodated. That is, the field doping in at least two regions of the CMOS chip must be controlled to provide the required isolation between devices. Each additional mask step adds to the cost of the process and potentially decreases the yield. Accordingly, there is a need for an improved process which reduces the number of masking and other process steps required to produce a given device structure. There is also a need for an improved process which overcomes the foregoing and other problems associated with the conventional formation of isolating thermal oxide and which can also provide self-alignment of field doping and field oxides.
Accordingly, it is an object of this invention to provide an improved process for controlling the surface doping of a semiconductor device.
It is another object of this invention to provide an improved process for isolating between devices in a CMOS integrated circuit.
It is yet another object of this invention to provide an improved process for fabricating CMOS circuits with a reduced number of masking layers.